According to the test standard of the solderability test, this test mainly detects whether the tinning ability of the chip pins meets the standard.

Standard professional baking and vacuum packaging can protect the chip from moisture damage and maintain chip availability and reliability, refer to the standard J-STD-033B.1.

According to the device pins and related instructions specified by the manufacturer in the specification, use a semiconductor tube characteristic grapher to check whether the chip is damaged through open circuit and short circuit tests.

Quality

Inspection

control

TESTING

Our laboratory is equipped with a variety of programming equipment, which can support the programming and programming of 103,477 ICs produced by 405 IC manufacturers. Provides detection of logic devices including: EPROM, Parallel and Serial EEPROM, FPGA, Configuration Serial PROM, Flash, BPROM, NOVRAM, SPLD, CPLD, EPLD, Microcontroller, MCU and Standard.

Appearance test refers to confirming the number of chips received, inner packaging, humidity indication, desiccant requirements and proper outer packaging. Secondly, the appearance inspection of a single chip mainly includes: the typing of the chip, Date code, the country of origin, whether it has been re-coated, the state of the pins, whether there are re-grinding marks, unknown residues, and the location of the manufacturer's LOGO.

X-ray testing is a real-time non-destructive analysis to check the hardware components inside the components, mainly checking the lead frame of the chip, wafer size, gold wire bonding map, ESD damage and holes.

Uncovering (unsealing) mainly uses instruments to corrode the package on the surface of the chip, check whether there is a wafer inside, the size of the wafer, the logo of the manufacturer, the copyright year, and the wafer code, which can determine the authenticity of the chip.